Fishing – trapping – and vermin destroying
Patent
1994-03-03
1995-06-13
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 27, H01L 21336
Patent
active
054242347
ABSTRACT:
A method of making a MOSFET wherein a source/drain region is graded into three region portions having different concentrations. The method comprises the steps of forming a gate, an insulating film and a semiconductor film on a semiconductor substrate of a first conductivity type, and etching the insulating film and the semiconductor film to form gate side wall spacers. A first source/drain region is formed by implanting an impurity of a second conductivity type by using gate side wall spacers and a gate as a mask. After removing a portion of the semiconductor film corresponding to the upper portion of each gate side wall spacer, an impurity of the second conductivity type is implanted in the semiconductor substrate by using the remaining thin insulating film and the gate as a mask. The method also comprises the step of removing the remaining thin insulating film and implanting an impurity of the second conductivity type in the semiconductor substrate by using only the gate as a mask, to form a third source/drain region.
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Goldstar Electron Co. Ltd.
Wilczewski Mary
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