Twin-threshold load-sharing system with each processor in a mult

Details Twin-threshold load-sharing system with each processor in a mult Twin-threshold load-sharing system with each processor in a mult

1991-06-24

1992-10-13

Lee, Thomas C.

Boots, shoes, and leggings

395200, 395650, 364229, 3642293, 364230, 3642303, 3642301, 3642813, 364DIG1, 34082505, G06F 1516

Patent

active

051558580

ABSTRACT:
A method and apparatus for allocating work requests among a plurality of processors attached to a data ring. Each processor has an interface for communicating with the data ring. The interface for each work request accepting processor has a memory defining a plurality of destination addresses for which the associated processor will accept work requests. Each type of work request has several destination addresses corresponding to different priority levels. If that processor becomes too heavily loaded, it will delete one or more of the destination addresses for which the interface will accept work requests. Such a deletion results in the processor only accepting higher priority requests for a type of work request. Work request generating processors detect work request messages which have not been accepted when they return on the ring. Such messages are then retransmitted at a higher priority, and with a longer delay between consecutive transmissions of the work request message. Advantageously, such an arrangement permits each processor to regulate its own load based on its own measurements of work activity, while permitting repeated attempts to get each work request accepted.

REFERENCES:
patent: 3587054 (1971-06-01), Byrne
patent: 4011545 (1977-03-01), Nadir
patent: 4228496 (1980-10-01), Katzman et al.
patent: 4363094 (1982-12-01), Kaul et al.
patent: 4393468 (1983-07-01), New
patent: 4413318 (1983-11-01), Herrington
patent: 4418382 (1983-11-01), Larson et al.
patent: 4491916 (1985-01-01), Vallhonrat
patent: 4495570 (1985-01-01), Kitajima et al.
patent: 4654654 (1987-03-01), Butler et al.
patent: 4663706 (1987-05-01), Allen et al.
patent: 4665517 (1987-05-01), Widmer
patent: 4680757 (1987-07-01), Murakami et al.
patent: 4698629 (1987-10-01), Mori et al.
patent: 4714923 (1987-12-01), Tassle et al.
patent: 4752924 (1988-06-01), Darnell et al.
patent: 4769813 (1988-09-01), Lenart
patent: 4777591 (1988-10-01), Chang et al.
patent: 4792947 (1988-12-01), Takiyasu et al.
patent: 4807281 (1989-02-01), Weber et al.
patent: 4814979 (1989-03-01), Neches
patent: 4827499 (1989-05-01), Warty et al.
patent: 4890260 (1989-12-01), Chuang et al.
patent: 4925311 (1990-05-01), Neches et al.
patent: 4949338 (1990-08-01), Albal et al.
patent: 5031089 (1991-07-01), Liu et al.
patent: 5053950 (1991-10-01), Naganuma et al.
A. D. Fergeson et al., "The AT&T Interprocess Message Switch Architecture", Proceedings of the IEEE International Communications Conference, Jun. 1987, pp. 11.5.1-11.5.5.
R. M. Genke et al., "No. 1 ESS.TM. Call Store-A 0.2 Megabit Ferrite Sheet Memory":, The Bell System Technical Journal, vol. 43, Part 1 of 2, Sep. 1964, pp. 2147-2191.
R. Alonso et al., "Sharing Jobx Among Independently Owned Processors", Proceedings 8th International Conference On Distributed Computing Systems, San Jose U.S., Jun. 13, 1988, pp. 282-287.
D. L. Eager et al., "Adaptive Load Sharing In Homogeneous Distributed Systems", IEEE Transactions On Software Engineering, vol. 12, No. 5, May 1986, pp. 662-675.

Affiliated with

Also associated with

Rating

Twin-threshold load-sharing system with each processor in a mult does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Twin-threshold load-sharing system with each processor in a mult, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Twin-threshold load-sharing system with each processor in a mult will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1308179