Double balanced mixer circuit with less power consumption

Details Double balanced mixer circuit with less power consumption Double balanced mixer circuit with less power consumption

1996-09-19

1998-09-08

Le, Thanh Cong

Telecommunications

Receiver or analog modulated signal frequency converter

Frequency modifying or conversion

455333, 327359, H04B 128

Patent

active

058059873

ABSTRACT:
A double balanced mixer circuit of reduced power consumption includes two single balanced mixer circuits each of which has a pair of first transistors. Output side terminals of the first transistors are cross-coupled between the two pairs, and first differential signals are supplied to control terminals of the first transistors. Connected in series to each pair of first transistors is a second transistor of a pair of second transistors. The double balanced mixer circuit also includes a differential amplifier circuit including a pair of third transistors, with fourth transistors connected to the pair of third transistors. The fourth transistors function as constant current sources for the pair of third transistors. Second differential signals are supplied to control terminals of the third transistors and differential output terminals of the third transistors are directly coupled to control terminals of the pair of second transistors.

REFERENCES:
patent: 4058771 (1977-11-01), Oshawa et al.
patent: 5548840 (1996-08-01), Heck
patent: 5630228 (1997-05-01), Mittel
T. Tsukahara, et al., "A Low-Voltage 2-GHz Si-Bipolar Direct-Conversion Quadrature Modulator", Technical Report of IEICE, ICD94-61, 1994, pp. 23-30.
T. Tsukahara, et al., "WP 2.6: A 2V 2GHz Si-Bipolar Direct-Conversion Quadrature Modulator", 1994 IEEE International Solid-State Circuits Conference, pp. 40-41 and 306.

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