Patent
1993-09-01
1998-09-08
Robertson, David L.
395551, 395494, G06F 104
Patent
active
058059121
ABSTRACT:
A microprocessor is provided which executes synchronous accesses to an external memory whether the external memory is operating at the same frequency as the operating frequency of the microprocessor or whether the external memory is operating at a frequency which is one-half the microprocessor operating frequency. The microprocessor includes a rate control input for receiving a rate control signal having a first level indicative of the microprocessor frequency being equal to the external memory frequency or a second level indicative of the microprocessor frequency being twice the external memory frequency. A memory access control is coupled to the rate control input and is responsive to the rate control signal, an internal microprocessor clock, and the external memory clock for causing the microprocessor to access the external memory in synchronism with the external memory clock when the external memory frequency is either equal to the microprocessor frequency or is one-half the microprocessor frequency.
REFERENCES:
patent: 4095267 (1978-06-01), Morimoto
patent: 4217637 (1980-08-01), Faulkner et al.
patent: 4615017 (1986-09-01), FiNlay et al.
patent: 4794523 (1988-12-01), Adan et al.
patent: 4847758 (1989-07-01), Olson et al.
patent: 4933835 (1990-06-01), Sachs et al.
patent: 4956804 (1990-09-01), Matsumoto
patent: 5012410 (1991-04-01), Ueda
patent: 5036230 (1991-07-01), Bazes
patent: 5043873 (1991-08-01), Muramatsu et al.
patent: 5059818 (1991-10-01), Witt et al.
patent: 5119485 (1992-06-01), Ledbetter, Jr. et al.
patent: 5142487 (1992-08-01), Graham, III
patent: 5155843 (1992-10-01), Stamm et al.
patent: 5179667 (1993-01-01), Iyer
patent: 5191657 (1993-03-01), Ludwig et al.
patent: 5201036 (1993-04-01), Yoshimatsu
patent: 5263172 (1993-11-01), Olnowich
patent: 5274788 (1993-12-01), Koike
patent: 5305452 (1994-04-01), Khan et al.
patent: 5307469 (1994-04-01), Mann
patent: 5442769 (1995-08-01), Cororan et al.
patent: 5481690 (1996-01-01), Grumlose et al.
Electronic Design, vol. 31, No. 24, Nov. 24, 1983, WaseCA, MN, Denville, NJ, USA, H.W. Look, et al. "clock chp mutes fast % Ps with slower devices", pp. 125-132.
IBM Technical Disclosure Bulletin, vol. 32, No. 9A, Feb. 1990, New York, US, "Dynamic Clock Frequency Changing For a Memory Controller", pp. 345-350.
Johnson William M.
Witt David B.
Advanced Micro Devices
Robertson David L.
LandOfFree
Microprocessor arranged to synchronously access an external memo does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Microprocessor arranged to synchronously access an external memo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microprocessor arranged to synchronously access an external memo will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1294579