Interrupt process distributing system

Details Interrupt process distributing system Interrupt process distributing system

1997-03-11

1998-09-08

Harvey, Jack B.

395733, 395736, 395672, G06F 1516, G06F 1324

Patent

active

058058834

ABSTRACT:
An interrupt process distributing system, provided in a CPU board in a loose-coupled type multiprocessor system formed of a plurality of CPU boards and one I/O board which are interconnected through common mediation and interrupt busses. A CPU executes interrupt requests; a queue counter, connected to the CPU through an internal bus, counts the interrupt requests which are sent from the common bus to and queued in the CPU. An interrupt transfer control unit, connected to the CPU and the queue counter through the internal bus, counts the interrupt requests as received from the interrupt bus, compares the number of queued interrupts with the number of received interrupt requests, and transfers the received interrupt requests to the CPU when the number of the received interrupt requests exceeds the number of queued interrupt requests.

REFERENCES:
patent: 4709324 (1987-11-01), Kloker
patent: 5155858 (1992-10-01), DeBruler et al.
patent: 5282275 (1994-01-01), Andre et al.
patent: 5319753 (1994-06-01), MacKenna et al.
patent: 5428799 (1995-06-01), Woods et al.

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