Microcomputer with prefixing functions

Details Microcomputer with prefixing functions Microcomputer with prefixing functions

1983-11-16

1988-02-09

Zache, Raulfe B.

Boots, shoes, and leggings

364300, G06F 1300, G06F 900

Patent

active

047245174

ABSTRACT:
A programmable, high speed, single chip microcomputer includes 4K of RAM, ROM, registers and an ALU. Program can be stored in the on-chip RAM. The first local variable of each process to be executed is a workspace pointer (WPTR), and each process has a respective workspace identified by its WPTR. For each process, addressing of other variables is relative to the current WPTR, which is stored in a workspace pointer register (WPTR REG). Instructions are constant bit size, having a function portion and a data portion loaded, respectively, into an instruction buffer (IB) and an operand register (OREGTR). Memory address locations are formed by combining the contents of the workspace pointer register and the operand register, or the contents of the A Register and the operand register. A set of "direct functions" obtains data from OREG. "Indirect functions" use the OREG contents to identify other functions, obtaining data from registers other than the operand register. A "prefixing" function (PFIX) develops operands having long bit lengths. Scheduling and descheduling of processes are achieved by forming a linked list within the several workspaces for the active processes. Each workspace identifies the workspace pointer of the next process to be executed. Each workspace contains in memory the identification of the next instruction to be executed for that respective process. A "last pointer" register (LPTR REG.) cooperates in the scheduling operations. Each microcomputer chip can be coupled serially to other such chips on a respective pair of only two wires, each a unidirectional channel. Each channel also has two registers, one for process identification and one for data. Communications are synchronized.

REFERENCES:
patent: 3541518 (1970-11-01), Bell et al.
patent: 3657705 (1972-04-01), Mekota, Jr. et al.
patent: 3766532 (1973-10-01), Liebel, Jr.
patent: 4034345 (1977-07-01), Deis
patent: 4047247 (1977-09-01), Stanley et al.
patent: 4084228 (1978-04-01), Dufond
patent: 4109310 (1978-08-01), England et al.
patent: 4258419 (1981-05-01), Blahut et al.
patent: 4482950 (1984-11-01), Dshkunian et al.
Schnabel, "Microprogrammed Byte Moves With Word Offset," IBM Technical Disclosure Bulletin, vol. 8, No. 4 (Sept. 1965), pp. 549-552.
Dirac, "Control Word Expansion," IBM Technical Disclosure Bulletin, vol. 3, No. 7 (Dec. 1960), p. 23.
Taylor, "A Method of Increasing the Number of Orders in a Digital Computer," IRE Transaction on Electronic Computers, vol. EC-11, No. 3 (Jun. 1962), p. 416.
Smith, "Multi-function Single Chip Microcomputers," Electro/80 Conference Record, May 13-15, 1980, vol. 5, pp. 1-110.
Richards et al., BCPL The Language And Its Compiler, (1980).
Bell System Technical Journal, pp. 1850-1869, 1876-1885, (1964).
Computer Engineering by Bell et al., p. 382, (1978).
Treleaven, "VLSI Processor Architectures" IEEE Computer, (Jun. 1982).
Browning et al., "Communication In a Tree Machine," Caltech Conference on VLSI, (1981).

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