Patent
1985-11-21
1988-02-09
Sikes, William L.
H01L 2302, H01L 2312
Patent
active
047244739
ABSTRACT:
A micropackage (1) for encapsulating an electronic component (5), includes a body fitted with a plurality of external connection tabs (2) which pass underneath the body (at 3) and which terminate in tips (17) located underneath the body. The body is made of a material which is not wettable by solder (e.g. plastics or ceramics). At least one groove (15) is formed in the underside of the body in the proximity of said tips (17). The, or each, groove is filled with solder (16) in contact with the tips. This enables the micropackage to be placed on an interconnection substrate (8) having a pattern of conductive tracks (10) matching the external connection tabs (2), and to be soldered thereto by melting the solder so that it is drawn along the tabs by capillarity to occupy the spaces (18) around the points (3) where the tabs (2) touch the tracks (10).
REFERENCES:
patent: 4345814 (1982-08-01), Gutbier et al.
Japanese Patent Abstracts, vol. 5, No. 117 (E-67) (789), 28, Jul. 1981; & JP-A-56 56655 (Hitachi Seisakusho K.K.) 18.05.1981.
IBM Technical Disclosure Bulletin, vol. 25, No. 4, Sept. 1982, pp. 1934-1935, New York, U.S., E. Barkhuff et al.: "Attachment Method for Chip Carriers".
"Thomson-CSF"
Sikes William L.
Wise Robert E.
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