Apparatus for processing images having desired gray levels inclu

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340750, 340799, 364518, G06F 1520

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049439375

ABSTRACT:
An image processing apparatus includes a 3-dimensional frame memory. The frame memory is made up of a plurality of memory planes which are logically stacked in a depth direction (Z direction) and are accessed independently. The apparatus also includes a memory controller which can access a plurality of memory areas of the frame memory. These memory areas can be located in any desired position in the depth direction, and can each have a desired number of bits in the depth direction, regardless of a bit length of image buses contained in the apparatus and connected to an image processor, and the memory controller. The image processor receives data through the image buses, logically operates the data and outputs it to the image buses. When in read mode, the memory controller converts the data read out from the memory areas of the frame memory into the type of data which can be transferred through the image buses. When in write mode, the memory controller converts the data received from the image buses into data which can be written into the memory areas.

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German Patent Office Action and Translation Dated Dec. 9, 1988.
M. J. B. Duff, Special Hardware for Pattern Processing, IEEE Proceedings of the 6th International Conference on Pattern Recognition, Oct. 19-22, 1982, pp. 368-397.

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