Storage control system in which real address portion of TLB is o

Details Storage control system in which real address portion of TLB is o Storage control system in which real address portion of TLB is o

1987-10-20

1990-07-24

Chan, Eddie P.

Boots, shoes, and leggings

3642328, 3642563, G06F 1210, G06F 1300

Patent

active

049439146

ABSTRACT:
The storage control system translates a logical address into a real address by using a translation lookaside buffer (TLB), and checks if a data to be referred to is present in a buffer storage by using a buffer address array (BAA). An integrated logic-in memory device for the storage control system includes a first memory for holding a real address part of the TLB, a second memory for holding a real address part of the BAA, and comparator means, for comparing outputs from the first and second memories, thus eliminating the transfer of a real address from the TLB to the BAA as in a discrete circuit form.

REFERENCES:
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patent: 4695950 (1987-09-01), Brandt et al.
IEEE International Solid State Circuits Conf., vol. 25, Feb. 1982, pp. 180-181, 317, N.Y., U.S.; M. Odaka et al.: "Logic-In-Memory VLSI for Mainframe Computers".
"A RISC Microprocessor with Integral MMU and Cache Interface", written by Hansen et al., IEEE International Conference in Computer Design: VLSI in Computers, Port Chester, N.Y., Oct. 1986, pp. 145-148.
IBM Tech. Discl. Bulletin, vol. 27, No. 11, Apr. 1985, "Read-Select Capablity for Static Random-Access Memory", pp. 6640-6642.
WESCON 86/Conference Record, vol. 30, 18-20 Nov. 1986, pp. 38/5, 1-5, Session 3B15, Los Angeles, Calif. U.S.; A. Martin: "Design Strategies in High Performance Multiuser Systems".

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