Digital error measuring circuit for shading and registration err

Details Digital error measuring circuit for shading and registration err Digital error measuring circuit for shading and registration err

1980-04-11

1982-04-20

Masinick, Michael A.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358 10, 358139, H04N 962

Patent

active

043262198

ABSTRACT:
To provide measurement of horizontal and vertical spatial errors, as well as shading errors, the active video picture is divided horizontally into 13 equal blocks, and vertically into 14 bands of checkers. During the setup mode, the signal from a selected camera is fed to an A/D converter in the video signal path, and to sync and pattern validation circuits which provide control and timing signals and an electronic test pattern signal. Horizontal error measurement is provided via a horizontal adder/memory loop whereby selected samples within the blocks of successive horizontal lines are selectively summed to provide successive pairs of summed horizontal digital data. Vertical error measurement is done simultaneously by a vertical adder/memory circuit whereby selected adjacent samples of alternate checkers are selectively delayed and added, to provide successive pairs of summed vertical digital data. During a read cycle, the horizontal and vertical pairs of digital data are selectively subtracted to inherently cancel the effects of existing shading errors, blooming, crosstalk, etc., and the difference signals are D/A converted. The horizontal and vertical transition and zero crossing information is established, and the transitions information are compared with the electronic test pattern signal to derive the digital horizontal and vertical spatial error data for storage in a microprocessor memory. Shading error data are provided from the vertical adder/memory circuit and also are stored in the microprocessor memory. The stored error data are subsequently retrieved and used to provide spatial and shading correction during the camera operating mode.

REFERENCES:
patent: 4200934 (1980-04-01), Hofmann
patent: 4234890 (1980-11-01), Astle et al.

Affiliated with

Also associated with

Rating

Digital error measuring circuit for shading and registration err does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital error measuring circuit for shading and registration err, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital error measuring circuit for shading and registration err will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1265728