Method of manufacturing a semiconductor device

Metal treatment – Compositions – Heat treating

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148187, 148188, H01L 2126

Patent

active

042723043

ABSTRACT:
A method of manufacturing a semiconductor device by depositing a first insulation layer on a substrate in which a base region is formed, depositing a second insulation layer on said first insulation layer, and forming ports by the self-alignment process through which an emitter region and electrodes are deposited, said method further comprising the steps of depositing a covering layer on the second insulation layer, and selectively etching the other portions of the covering layer than that which covers a base electrode deposition preliminary port and thereafter forming the emitter region. The retained portion of the covering layer completely prevents an emitter diffusion impurity from being carried into a base electrode deposition port during the formation of an emitter region.

REFERENCES:
patent: 3755014 (1973-08-01), Appels et al.
patent: 3986896 (1976-10-01), Veno et al.
patent: 4110125 (1978-08-01), Beyer

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