Patent
1987-05-19
1989-08-15
Clawson, Jr., Joseph E.
357 20, 357 234, 357 39, 357 43, 357 86, H01L 2974
Patent
active
048579831
ABSTRACT:
The present invention relates generally to monolithically integrated insulated gate semiconductor devices and more particularly to an improved structure which provides for high current density, low voltage drop conduction in both forward and reverse directions. More particularly, a single insulated gate device can initiate and interrupt current flow in both the forward and reverse directions.
REFERENCES:
patent: 4199774 (1980-04-01), Plummer
patent: 4364073 (1982-12-01), Becke et al.
patent: 4443931 (1984-04-01), Baliga et al.
patent: 4604638 (1986-08-01), Matsuda
Plummer, James D., "Insulated-Gate Planar Thyristors: I-Structure and Basic Operation", IEEE Transactions on Electron Devices, vol. ED-27, No. 2, Feb. 1980, pp. 380-386.
Russell, J. P. et al., "The COMFET-A New High Conductance MOS-Gated Device", IEEE Electric Device Letters, vol. EDL-4, No. 3, Mar. 1983, pp. 63-65.
Scharf, B. W. et al., "Insulated-Gate Planar Thyristors: II-Quantitative Modeling", IEEE Transactions on Electron Devices, vol. ED-27, No. 3, pp. 387-393.
Baliga Bantval J.
Pattanayak Deva N.
Clawson Jr. Joseph E.
Davis Jr. James C.
General Electric Company
Ochis Robert
Snyder Marvin
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