Semiconductor memory controller for reducing pass through curren

Details Semiconductor memory controller for reducing pass through curren Semiconductor memory controller for reducing pass through curren

1994-06-23

1996-10-15

Coleman, Eric

Boots, shoes, and leggings

3642544, 364254, 3642599, 364DIG1, G06F 1300

Patent

active

055663117

ABSTRACT:
In a semiconductor memory controller there are provided in parallel N-bit even number and odd number byte address decoder circuits, a 2N-bit address decoder circuit, even number and odd number byte subaddress decoder circuits for semiconductor memories having smaller capacities than semiconductor memories connected to the even and odd number byte subaddress decoder circuits and the 2N-bit address decoder circuit. The semiconductor memories are controlled to form a continuous address space. Signal levels are controlled by a pass through current preventing input buffer circuit, a three state output buffer circuit, and a backup state control circuit. Thereby, semiconductor memories different from each other in volatile
on-volatile type, memory capacity, and data bus width can be controlled even in a mixed state and unnecessary power consumption due to pass through power is significantly reduced.

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