Passive processor communications interface

Details Passive processor communications interface Passive processor communications interface

1990-06-22

1992-04-28

Fleming, Michael R.

Boots, shoes, and leggings

364239, 3642402, 3642474, 364238, G06F 1300

Patent

active

051094940

ABSTRACT:
A passive interface between a processor and a peripheral device is shown. The peripheral device could also be another processor. The interface allows asynchronous communication between the devices. Speed limitations are minimized as the processor has the ability within the interface to know when it can send data, and when it has received data. The number of interface pins is also minimized. Also, communication between devices can still be performed even if the devices have different data bus widths.

REFERENCES:
patent: 4112490 (1978-09-01), Pohlman et al.
patent: 4159516 (1979-06-01), Henrion et al.
patent: 4234919 (1980-11-01), Bruce et al.
patent: 4263650 (1981-04-01), Bennett et al.
patent: 4315308 (1982-02-01), Jackson
patent: 4514808 (1985-04-01), Murayama et al.
patent: 4563736 (1986-01-01), Boudreau et al.
patent: 4638451 (1987-01-01), Hester et al.
patent: 4744023 (1988-05-01), Welsh
"56-Bit General Purpose Digital Signal Processor", Motorola DSP56001, pp. 1-25, 1986.

Affiliated with

Also associated with

Rating

Passive processor communications interface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Passive processor communications interface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Passive processor communications interface will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1253968