Method and apparatus to improve read reliability in semiconducto

Details Method and apparatus to improve read reliability in semiconducto Method and apparatus to improve read reliability in semiconducto

1995-06-06

1996-10-15

Canney, Vincent P.

Excavating

39518318, 371 51, G06F 1100

Patent

active

055661947

ABSTRACT:
Apparatus for controlling a length of a period during which the output circuitry of a memory array waits before latching the output data including apparatus for detecting the presence of an error in data read from an memory array, apparatus for providing a first value to determine a wait period, apparatus responsive to the detection of an error for providing a second value, apparatus responsive to the first value for generating a signal to latch a data output from the memory array after a first period and responsive to the second value for generating a signal to latch a data output from the memory array after a second period.

REFERENCES:
patent: 4642759 (1987-02-01), Foster
patent: 4644494 (1987-02-01), Muller
patent: 4763305 (1988-08-01), Kuo
patent: 4802117 (1989-01-01), Chrosny et al.
patent: 4896262 (1990-01-01), Wayama et al.
patent: 4958315 (1990-09-01), Balch
patent: 5012425 (1991-04-01), Brown
patent: 5067128 (1991-11-01), Nakane
patent: 5070474 (1991-12-01), Tuma et al.
patent: 5077737 (1991-12-01), Leger et al.
patent: 5131089 (1992-07-01), Cole
patent: 5200959 (1993-04-01), Gross et al.
patent: 5268906 (1993-12-01), Free
Gross, Stephen J. and Jorge-Luis Sanchez, "Solid-State Mass Storage Arrives", Product Feature, Memory Card Systems & Design, Jul./Aug. 1992.
Tanenbaum, Andrew S., "Structured Computer Organization: Third Edition", Chapter 3, Section 3.4, Prentice Hall, Inc., 1990, pp. 115-119.
Robinson, Kurt, "Trends in Flash Memory System Design", Wescon Conference Record, Nov. 1990, pp. 468-472.

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