Boots – shoes – and leggings
Patent
1997-03-18
1999-01-19
Mai, Tan V.
Boots, shoes, and leggings
364827, G06G 702, G06G 719
Patent
active
058620702
ABSTRACT:
A high-speed discrete cosine transformation circuit includes the one-dimensional input signals x(0) to x(7) being input in parallel to the positive input terminals "+" or the negative input terminals "-" of eight neural operation units (NOU) 11 to 18 through capacitors d0 to d6. In each NOU 11 to 18, input signals x(0) to x(7) are added and subtracted. Input signals x(0) to x(7) are multiplied beforehand by the coefficient in proportion to the capacities of capacitors d0 to d6 which are connected to NOU 11 to 18. Thereafter, discrete cosine transforming coefficients y(0) to y(7) are output. A two-dimensional discrete cosine transformation circuit is realized by using the one-dimensional discrete cosine transforming circuit.
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patent: 5166896 (1992-11-01), Jeong et al.
patent: 5187680 (1993-02-01), Engeler
P.R. Chang et al., "A High-Speed Neural Analog Circuit for Computing the Bit-Level Transform Image Coding", IEEE Transactions on Consumer Electronics, vol. 37, No. 3, Aug. 1991, pp. 337-342.
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W.E. Engeler et al., "Matrix Multipliers for Calculating Orthogonal Transforms", IEEE International Conference on Solid State Circuits, Feb. 1979, pp. 72-73.
Chen Jie
Shou Guoliang
Takatori Sunao
Zhou Chanming
Mai Tan V.
Sharp Kabushiki Kaisha
Yozan Inc.
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