Multilayer interconnection substrate

Details Multilayer interconnection substrate Multilayer interconnection substrate

1991-05-20

1994-06-14

Ryan, Patrick J.

Stock material or miscellaneous articles

Structurally defined web or sheet

Including aperture

428209, 428210, 428688, 428901, 361794, 174250, B32B 900

Patent

active

053208943

ABSTRACT:
A multilayer interconnection substrate having, e.g., first to third power interconnections provided with first to third interconnection layers. A first insulating layer is provided between the first and second interconnection layers, and a second insulating layer is provided between the second and third interconnection layers. A plurality of first via holes are provided at said first insulating layer and connect the first and second power interconnections and a plurality of second via holes are provided at said second insulating layer with their position being shifted from that of the first via holes and connect the second and third power interconnection.

REFERENCES:
patent: 4795670 (1989-01-01), Nishigaki et al.
patent: 4954480 (1990-09-01), Imanaka et al.
patent: 5082718 (1992-01-01), Chantraine et al.
European Search Report for Application EP 91 30 4397 and Annex thereto.
IEEE/ISHM, 90, 8th IEMT, May 7-9, 1990, CH28333-2/90/0000-0073, pp. 73-81, M. L. Zorilla et al., "New Technologies to Improve Density on Multichip Modules".
Patent Abstracts of Japan, vol. 10, No. 224 (E-425)(2280) Aug. 5, 1986 & JP-A-61 059 855 (Fujitsu Ltd.).

Affiliated with

Also associated with

Rating

Multilayer interconnection substrate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multilayer interconnection substrate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayer interconnection substrate will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1248106