Method and apparatus for testing a static RAM

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365200, 365201, G11C 2900

Patent

active

056871783

ABSTRACT:
A method and apparatus for testing a static RAM includes a word line voltage control circuit (42) and an array supply voltage control circuit (46). In response to receiving a first control signal from a tester, the word line voltage control circuit (42) is used to provide a word line voltage to each word line of the memory array (31). The array supply voltage control circuit (46) provides a supply voltage to the array (31) in response to receiving a second control signal from the tester. During testing of memory 30, the array supply voltage and the word line voltage are supplied independently of the memory power supply voltage V.sub.DD in order to quickly detect memory cells that are defective due to soft defects.

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