Timing signal extracting circuit suitable for CMI signals

Details Timing signal extracting circuit suitable for CMI signals Timing signal extracting circuit suitable for CMI signals

1994-02-23

1996-05-07

Beausoliel, Jr., Robert W.

Excavating

375359, G06F 1100, H03M 1300

Patent

active

055153895

ABSTRACT:
A timing extracting circuit according to the present invention includes a trailing edge detection circuit for detecting a trailing edge of a CMI signal. A trailing edge detection pulse is supplied to an AND gate and to a series circuit composed of a 3/2T delay circuit and a 2T delay circuit through an inverter. A 3/2T delayed, a T delayed and a 2T delayed outputs are supplied to the AND gate whose output is supplied to an OR gate and a 9T delay circuit. A T to 9T delayed outputs of the 9T delay circuit are also supplied to the OR gate and an extracted clock is obtained at an output of the OR gate. Trailing edge detection pulse of violation is removed by the AND gate and the thus removed regular detection pulse is supplemented by the OR gate.

REFERENCES:
patent: 4837782 (1989-06-01), Sasaki
patent: 5195110 (1993-03-01), Gorshe

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