Test control circuit for controlling a setting and resetting of

Details Test control circuit for controlling a setting and resetting of Test control circuit for controlling a setting and resetting of

1993-09-27

1995-11-14

Voeltz, Emanuel T.

Excavating

371 221, 371 226, H04Q 900, G01R 3128, G01R 3100

Patent

active

054673542

ABSTRACT:
In a scan path so configured that a series of tests using a scan path are performed by a scan shift of shifting the data of a scan path flipflop and a normal circuit test of testing a circuit for a normal operation by using the shifted data, and that at the time of the scan path testing, the scan path flipflop fetches data at a first timing and outputs the fetched data at a second timing, there is provided a scan path test control circuit which includes a control circuit so constructed to generate a logical value which never either sets or resets the scan path flipflop at the time of the scan shifting, and a logical value of validating a normal logic which sets or resets the scan path flipflop after the scan shifting. The test control circuit also generates, at the time of the normal test, a logic value which neither sets nor resets the scan path flipflop in synchronism with a timing signal between the first timing after the data is fetched and the second timing.

REFERENCES:
patent: 4580137 (1986-04-01), Fiedler et al.
patent: 4588944 (1986-05-01), Rothenberger
patent: 5155432 (1992-10-01), Mahoney
patent: 5260950 (1993-11-01), Simpson et al.

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