Method for dynamically reconfiguring a processor

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395653, G06F 900

Patent

active

058900080

ABSTRACT:
A method and apparatus for dynamically reconfiguring a processor involves placing the processor in a first configuration having a first number (m) of strands while the coded instructions comprise instructions from a number (m) threads. The instructions in each of the m threads are executed on one of the m strands using execution resources at least some of which are shared among the m strands. While the coded instructions comprise instructions from a number (n) threads, the processor is placed in a second configuration having a second number (n) of strands. The instruction are executed in each of the n strands using execution resources at least some of which are shared among the n strands.

REFERENCES:
patent: 4891810 (1990-01-01), de Covlieu
patent: 5535406 (1996-07-01), Kolchinsky
patent: 5687360 (1997-11-01), Chang
patent: 5706514 (1998-01-01), Bonola
patent: 5784613 (1998-07-01), Tamirisa

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