Shallow trench isolation of MOSFETS with reduced corner parasiti

Details Shallow trench isolation of MOSFETS with reduced corner parasiti Shallow trench isolation of MOSFETS with reduced corner parasiti

1998-07-16

1999-11-23

Fahmy, Wael

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438435, 438437, 438438, H01L 218224

Patent

active

059899786

ABSTRACT:
A method is described for forming MOSFETs with shallow trench isolation wherein the abrupt corners introduced by anisotropically etching the silicon trenches are modified by an oxidation step which rounds off the corners and also reduces the effect of tensile stresses caused by the densified trench filler material. The method selectively exposes the corner regions to an oxidation whereby the formation of an oxide birdsbeak modulates the corners and introduces a compressive stress component in the corner region. Several variations of the procedure are disclosed, including embodiments wherein birdsbeaks extending in both a vertical and horizontal directions from the corners are employed. The channel and gate oxide edges of MOSFETs extend to these corners. By attenuating the abrupt corners and reducing the mechanical stresses, gate oxide integrity is improved and anomalous sub-threshold currents of MOSFETs formed are abated.

REFERENCES:
patent: 5447884 (1995-09-01), Fahey et al.
patent: 5492858 (1996-02-01), Bose et al.
patent: 5641704 (1997-06-01), Paoli et al.
patent: 5643823 (1997-07-01), Ho et al.

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