Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1997-12-12
1999-11-23
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438118, 438127, H01L 2144, H01L 2148, H01L 2150
Patent
active
059899360
ABSTRACT:
A structure including a conductive, preferably metallic conductive layer is provided with leads on a bottom surface. The leads have fixed ends permanently attached to the structure and free ends detachable from the structure. The structure is engaged with a microelectronic element such as a semiconductor chip or wafer, the free ends of the leads are bonded to the microelectronic element, and the leads are bent by moving the structure relative to the microelectronic element. Portions of the conductive layer are removed, leaving residual portions of the conductive layer as separate electrical terminals connected to at least some of the leads. The conductive layer mechanically stabilizes the structure before bonding, and facilitates precise registration of the leads with the microelectronic element. After the conductive layer is converted to separate terminals, it does not impair free movement of the terminals relative to the microelectronic element.
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Fjelstad Joseph
Smith John W.
Jones Josetta I.
Niebling John F.
Tessera Inc.
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