Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1994-09-30
1999-11-23
Graybill, David E.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438123, 438129, 438611, H01L 2160
Patent
active
059899344
ABSTRACT:
A process for manufacturing a semiconductor device wherein the number of input/output terminals can be selectively increased while using input/output amplifier circuit functional portions having the same circuit configuration, by using both ball bonding and TAB bonding techniques. Every two (4A, 4B) of the electrodes on the semiconductor device correspond to each one set of input/output amplifier circuits formed by three ones (6A, 6B, 6C) of the input/output amplifier circuits. The spacing S.sub.1 between the two electrodes (4A, 4B) corresponding to one set of input/output amplifier circuits is substantially equal to the spacing S.sub.2 between the electrode 4B and the adjacent electrode 4C of one adjacent set of input/output amplifier circuits and also to the spacing S.sub.3 between the electrode 4A and the adjacent electrode 4D of the other adjacent set of input/output amplifier circuits.
REFERENCES:
patent: 4403240 (1983-09-01), Seki et al.
patent: 4750666 (1988-06-01), Neugebauer et al.
patent: 4827326 (1989-05-01), Altman et al.
patent: 4892842 (1990-01-01), Corrie et al.
Nishino Tomoki
Takeda Masashi
Graybill David E.
Sony Corporation
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