Method of manufacturing trench capacitor with a recessed field o

Fishing – trapping – and vermin destroying

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437203, 437919, H01L 218242

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054666287

ABSTRACT:
A capacitor of a semiconductor device has a plate electrode which process margin and a method of manufacturing same are disclosed. The plate electrode has a planarized surface and borders a source region. A recessed field oxide layer defining an active region is formed on a semiconductor substrate. Then, an insulating pattern for self-aligning an electrode is formed on the active region. The insulating pattern has a step with respect to the field oxide layer. Thereafter, a trench is formed in the semiconductor substrate by partially removing the field oxide layer, the insulating pattern and a surface portion of the semiconductor substrate. A conductive material is deposited on the semiconductor substrate having the trench and the insulating pattern to form a conductive layer filling the trench. Then, the conductive layer is polished until the insulating pattern is exposed, to thereby obtain an electrode having a planarized surface. The plate electrode does not unnecessarily occupy space of the active region and the plate electrode bordering the active region can be formed by self-alignment with a step between the insulating pattern and the field oxide layer. Therefore, sufficient process margin is provided to generate high yields, and a highly integrated semiconductor device having an AST cell can be realized.

REFERENCES:
patent: 4734384 (1988-03-01), Tsuchiya
IBM TDB, vol. 27, No. 11, Apr. 1985, pp. 6694-6697.
IBM TDB, vol. 28, No. 6, Nov. 1985, pp. 2578-2579.

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