Patent
1996-02-07
1998-07-07
Lim, Krisna
G06F 938
Patent
active
057782199
ABSTRACT:
A method for supporting speculative execution includes designating operations as speculative or non-speculative, and then deferring exceptions generated by speculative operations while immediately reporting exceptions by non-speculative operations. If a speculative operation uses a result of a speculative operation that has generated an exception, the exception is propagated. Deferred exceptions are detected and reported using a check operation either incorporated into a non-speculative operation or inserted as a separate check operation. A system for supporting speculative execution includes a functional unit for recognizing a speculative operation and deferring any exceptions generated by such an operation. The functional unit may defer an exception by storing information indicating an error has occurred in the register file. To check for deferred exceptions, the functional unit then reads the register file. If an exception is detected, then the exception is processed and one or more of the speculative operation are re-executed (in a non-speculative mode) where necessary to process the exception.
REFERENCES:
patent: 5421022 (1995-05-01), McKeen et al.
patent: 5428807 (1995-06-01), McKeen et al.
patent: 5454117 (1995-09-01), Puziol et al.
patent: 5526499 (1996-06-01), Bernstein et al.
Some Design Ideas for a VLIW Architecture for Sequential-Natured Software, by K. Ebcioglu, Part 1: Paralle Architectures, Parallel Processing, Proceedings of the IFIP WG 10.3 Working Conference on Parallel Processing, Pisa, Italy, 25-27 Apr.1988, pp. 3-21.
IBM Research Report, "Some Global Compiler Optimizations and Architectural Features for Improving Performance of Superscalers", by K. Ebcioglu and R. Groves, pp. 1-13.
Sentinel Scheduling: A Model for Compiler-Controlled Speculative Execution, by S.A. Mahlke, W.Y. Chen, R.A. Bringmann, R.E. Hank, W.W. Hwu, B. Ramakrishna Rau and M.S. Schlansker, ACM Transactions on Computer Systems, Nov. 1993, pp. 1-47.
Sentinel Scheduling for VLIW and Superscaler Processors, by S.A. Mahlke, W.Y. Chen, W.W. Hwu, B. Ramakrishna Rau and M.S. Schlansker.
Amerson Frederic C.
Gupta Rajiv
Kathail Vinod K.
Rau B. Ramakrishna
Schlansker Michael S.
Hewlett--Packard Company
Lim Krisna
LandOfFree
Method and system for propagating exception status in data regis does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for propagating exception status in data regis, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for propagating exception status in data regis will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1216636