Input/output cache

Details Input/output cache Input/output cache

1992-07-09

1994-02-15

Kulik, Paul V.

Boots, shoes, and leggings

364DIG1, 3642434, 36424341, 3642435, 3642455, 3642456, G06F 1300

Patent

active

052874826

ABSTRACT:
A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Virtual memory addresses used by the input/output devices are translated into real addresses in the system memory. Virtual memory can be partitioned, with some virtual addresses being mapped to a second memory attached to the input/output bus.

REFERENCES:
patent: 3713107 (1973-01-01), Barsamian
patent: 4071890 (1978-01-01), Pandeya
patent: 4075686 (1978-02-01), Calle et al.
patent: 4395758 (1983-07-01), Helenius et al.
patent: 4451884 (1984-05-01), Heath et al.
patent: 4453216 (1984-06-01), Chiba et al.
patent: 4476526 (1984-10-01), Dodd
patent: 4493051 (1985-01-01), Brezzo et al.
patent: 4509116 (1985-04-01), Lackey et al.
patent: 4513369 (1985-04-01), Sato
patent: 4564900 (1986-01-01), Smitt
patent: 4669043 (1987-05-01), Kaplinsky
patent: 4695948 (1987-09-01), Blevins et al.
patent: 4700292 (1987-10-01), Campanini
patent: 4729094 (1988-03-01), Zolnowski et al.
patent: 4821185 (1989-04-01), Esposito
patent: 5003463 (1991-03-01), Coyle et al.
patent: 5161219 (1992-11-01), Nicholson et al.
IBM Technical Disclosure Bulletin, J. W. Kemp, D. P. Tuttle and M. A. Wieland, vol. 28, No. 9, Feb. 1986.
IBM Technical Disclosure Bulletin, J. T. O'Quin II, vol. 29, No. 4, Sep. 1986.

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