Static information storage and retrieval – Floating gate – Particular connection
Patent
1996-06-17
1998-07-07
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular connection
36518518, 36518521, 36518533, G11C 1134
Patent
active
057779236
ABSTRACT:
A flash memory includes a flash transistor array, a wordline decoder, a bitline decoder, a sourceline decoder and a read/write controller. The read/write controller has a voltage terminal to receive an input voltage and a data terminal to receive a new data signal. A sense amplifier is coupled to the bitline decoder and configured to sense a signal on a selected bitline and to generate an internal old data signal. A data comparator is coupled to the data terminal and the sense amplifier and configured to compare the new data signal to the old data signal and to generate a comparator signal. A voltage generator is configured to selectively apply one of a read set of voltages to read a selected cell in the flash transistor array, a program set of voltages to program a selected cell and an erase set of voltages to erase a selected cell. In a multistate embodiment, the read/write controller further includes a step counter configured to generate a plurality of step counts. The voltage generator is coupled to the step counter and configured to generate a wordline high voltage (WLHV) signal based on the step count. The WLHV signal is delivered to a selected multistate cell by the wordline decoder to read the contents of the selected multistate cell. Each step compares the old data and the new data in order to determine which memory cells to change. Advantages of the invention include increased flexibility of programming and erasing and improved memory longevity.
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Hsu Fu-Chang
Lee Peter W.
Tsao Hsing-Ya
Aplus Integrated Circuits, Inc.
Popek Joseph A.
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