Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With non-planar semiconductor surface
Patent
1992-03-31
1994-02-15
Wojciechowicz, Edward
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With non-planar semiconductor surface
257586, 257197, 257623, 437 84, 437107, 437133, 437228, 437249, 437947, H01L 2934, H01L 2120
Patent
active
052869970
ABSTRACT:
Generally, and in one form of the invention a method is disclosed for forming a subcollector for bipolar transistors comprising the steps of epitaxially depositing a subcollector layer 22 on a substrate 20, the subcollector containing a co-deposited dopant; etching the subcollector layer to define an active device region; depositing a collector layer 24 above the subcollector layer; depositing a base layer 25 above the collector layer 24; and depositing an emitter layer 27 above the base layer 25, whereby the subcollector layer does not extend beyond the active device region and is of low resistance.
REFERENCES:
patent: 4825265 (1989-04-01), Lunardi et al.
Burhan Bayraktaroglu et al., "p-n-p Heterojunction Bipolar Transistors with Buried Subcollector Layers", IEEE Electron Device Letters, vol. 10, No. 3, pp. 120-122, Mar. 1989.
Donaldson Richard L.
Kesterson James C.
Skrehot Michael K.
Texas Instruments Incorporated
Wojciechowicz Edward
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