Static information storage and retrieval – Format or disposition of elements
Patent
1996-02-29
1999-03-30
Zarabian, A.
Static information storage and retrieval
Format or disposition of elements
365 63, 36523003, G11C 502
Patent
active
RE0361690
ABSTRACT:
A semiconductor memory device is provided having a read out gate for detecting and providing to a main I/O line pair the potential difference of a sub-data input/output line pair, and a write gate for transferring data of the main I/O line pair to the sub-data input/output line pair in an energy region surrounded by a sense amplifier region and a word line coupling region. By providing the read out gate and the write gate in the empty region which was not conventionally used, the access operation can be carried out at high speed without increasing the chip area of the semiconductor memory device.
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Kiyoto Ohta et al., "A 1-Mbit DRAM with 33-MHz Serial I/O Ports", IEEE Journal of Solid-State Circuits, vol. sc-21, No. 5, Oct. 1986, pp. 649-654 .
Mitsubishi Denki & Kabushiki Kaisha
Zarabian A.
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