Reduced power tristate driver circuit

Details Reduced power tristate driver circuit Reduced power tristate driver circuit

1980-07-31

1982-12-14

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307473, 307445, 307270, H03K 19092, H03K 326

Patent

active

043639780

ABSTRACT:
A tristate driver circuit is provided having a logic input signal, to produce a logic 1 output level or a logic 0 output level, and a float input signal, to produce float state operation. The circuit comprises a first logic gate powered by a first buffer switch, a second logic gate powered by a second buffer switch, an output driver having a first driver input from the output of the first gate and a second signal driver input from the output of the second gate; the first and second buffer switches dissipating the greatest circuit power during the circuit float state operation, and means, coupled to the first and second buffer switches and to the source of float signal input signal, for interrupting power to the first and second buffer switches responsive to onset of the float state operation.

REFERENCES:
patent: 3792292 (1974-02-01), Priel
patent: 3906255 (1975-09-01), Menschji
patent: 4037114 (1977-07-01), Stewart et al.
patent: 4194131 (1980-03-01), Mrazek et al.
patent: 4194132 (1980-03-01), Mrazek
patent: 4280065 (1981-07-01), Minato et al.

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