Field effect transistor having self-registering source and drain

Details Field effect transistor having self-registering source and drain Field effect transistor having self-registering source and drain

1985-04-08

1989-04-25

James, Andrew J.

357 239, 357 2311, 357 59, 357 55, H01L 2978

Patent

active

048252670

ABSTRACT:
A field effect transistor is formed with a source and drain which are realized partly as a semiconductor region and a semiconductor body, and partly as a portion of a deposited epitaxial layer. A recess is formed into a substrate of the semiconductor body between the source and drain, and a channel region underlies the recess in the substrate. As a result of this construction, the channel length is independent of variations in the thickness of the epitaxial layer, and the stray capacitances from source and drain to the substrate are small. Moreover, a conductor pattern, separated from the epitaxial layer by an insulating layer, may extend to be on the connection zones of the source and drain, which involves a high packing density. The epitaxial layer, moreover, comprises extra wiring tracks. This gives a great freedom in design.

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