TTL to CMOS Input buffer

Details TTL to CMOS Input buffer TTL to CMOS Input buffer

1981-12-21

1984-09-11

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307291, 307297, 307363, 307451, H03K 19094, H03K 3356

Patent

active

044712421

ABSTRACT:
A TTL to CMOS input buffer accomplishes buffering a TTL signal to a CMOS signal without requiring current flow through a CMOS input inverter in a static condition by introducing a reference voltage to match the lowest level of a logic "1" of the TTL signal. The input inverter has a P channel transistor which, by having a source at the reference voltage, does not turn on when the TTL signal is at the lowest level of a logic "1". The reference voltage is selected to be less than the lowest level of a logic "1" minus the threshold voltage of the P channel transistor.

REFERENCES:
patent: 3675144 (1972-07-01), Zuk
patent: 3739194 (1973-06-01), Freeman et al.
patent: 3937982 (1976-02-01), Nakajima
patent: 3975649 (1976-08-01), Kawagoe et al.
patent: 4039862 (1977-08-01), Dingwall et al.
patent: 4045691 (1977-08-01), Asano
patent: 4048518 (1977-09-01), Koo
patent: 4128775 (1978-12-01), Frederiksen et al.
patent: 4342928 (1982-08-01), Gschwendtner et al.
patent: 4380710 (1983-04-01), Cohen et al.
Dingwall, "TTL-to-CMOS Buffer Circuit", RCA Tech. Notes, TN No. 1114, 6-11-1975, pp. 1-3.

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