Programmable output interface for lower level open system interc

Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing

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Details

709238, 709230, 710130, G06F 1318, G06F 1300, G06F 1516

Patent

active

060498374

ABSTRACT:
A programmable output interface in an Open System Interconnection (OSI) enables a Media Access (MAC) Layer to access a variety of Physical (PHY) Layer implementations without redesign of the interface. The programmable interface includes a control signal generator; an output clock gating generator, and an output polarity control device coupled to the PHY layer. The interface receives media access Start; media access Done signals; a Data Rate clock signal and a data signal. The control signal generator provides control signals for the physical layer components via the polarity control device. The active signal polarity and the relative timing of the control signals are controlled by programmable registers. The output clock gating generator provides clock signals to the physical layer components via the polarity control in response to the Start; Done and Data Rate signals. The output generator clock includes programmable interval registers for the various frame intervals including a User Pause Interval (UPI); Preamble Interval (PI); User Send Interval (USI), etc. The polarity control provides the correct signal polarity for each control, clock, and data signal.

REFERENCES:
patent: 5107456 (1992-04-01), Schuur
patent: 5111423 (1992-05-01), Kopec, Jr. et al.
patent: 5243273 (1993-09-01), McAuliffe et al.
patent: 5365546 (1994-11-01), Koenck et al.
patent: 5371736 (1994-12-01), Evan
patent: 5459453 (1995-10-01), Minerd et al.
patent: 5465106 (1995-11-01), Keech et al.
patent: 5473758 (1995-12-01), Allen et al.
patent: 5519701 (1996-05-01), Colmant et al.
patent: 5604870 (1997-02-01), Moss et al.
patent: 5615344 (1997-03-01), Corder
patent: 5617040 (1997-04-01), Matthews
patent: 5625825 (1997-04-01), Rostoker et al.
patent: 5640399 (1997-06-01), Rostoker et al.
patent: 5802287 (1998-09-01), Rostoker et al.
patent: 5838904 (1998-11-01), Rostoker et al.
IBM Technical Disclosure Bulletin, vol. 27, No. 10B, Mar. 1985.
IBM Technical Disclosure Bulletin, vol. 38, No. 04, Apr. 1995.
James Hickey, "A 50 MIP ATM Cell Processor for B-ISDN", IEEE 1992 Custom Integrated Circuit Conference, May, 1992.

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