Testing system for reliable access times in ROM semiconductor me

Details Testing system for reliable access times in ROM semiconductor me Testing system for reliable access times in ROM semiconductor me

1983-11-25

1985-04-09

Malzahn, David H.

Excavating

324 73R, G06F 1114, G06F 1124

Patent

active

045106037

ABSTRACT:
A testing circuit is disclosed for addressing and exercising a ROM-type memory and splitting the same memory output data into two paths. One path is used to temporarily hold the memory output data for a time-interval after which it is compared, in a digital comparator, with the same memory output data on the second path. When the data on both paths compare equally, then it is known that no instability has occurred during the time-interval. If a miscompare occurs, the comparator generates an error signal.

REFERENCES:
patent: 4332028 (1982-05-01), Joccotton
patent: 4335457 (1982-06-01), Early
patent: 4369511 (1983-01-01), Kimura et al.
patent: 4370746 (1983-01-01), Jones
Stafka, "Tester Catches RAM Errors at Max Speed" EDN, vol. 26, No. 8 Apr. 15, l981, pp. 150 & 152.

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