Method of making a CMOS device with trench isolation device

Details Method of making a CMOS device with trench isolation device Method of making a CMOS device with trench isolation device

1988-11-01

1990-12-25

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 38, 437 41, 437 56, 437 57, 437 63, 437 67, 437 91, 437228, H01L 2176

Patent

active

049803069

ABSTRACT:
A semiconductor device of the complementary metal-insulator semiconductor type is composed of a pair of N-type metal oxide semiconductor transistor formed on a P-type silicon substrate and P-type metal oxide semiconductor transistor formed on an n-type well disposed within the p-type substrate. An isolation tranch is disposed between the pair of adjacent transistors, and has one sidewall bordering the well, another opposed sidewall bordering the substrate, and a bottom wall. A selective epitaxial film of p-type is selectively epitaxially deposited on the sidewalls and bottom wall of the trench. The epitaxial film has a dopant density greater than that of the substrate. An insulation oxide material is filled within the trench so as to effectively isolate the pair of transistors from each other.

REFERENCES:
patent: 4412375 (1983-07-01), Matthews
patent: 4442591 (1984-04-01), Hakem
patent: 4447290 (1984-05-01), Matthews
patent: 4470062 (1984-09-01), Muramatsu
patent: 4645564 (1987-02-01), Morie et al.

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