Bias stabilization circuit

Details Bias stabilization circuit Bias stabilization circuit

1998-08-21

2000-08-08

Zweizig, Jeffrey

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327540, G05F 110

Patent

active

061007536

ABSTRACT:
The present invention relates to a bias stabilization circuit, specifically to a bias stabilization circuit for minimizing the current variations of amplification transistors caused by variations of device parameters which occur during the manufacturing of high-frequency integrated circuits using field-effect transistors, and caused by variations of supply voltage and temperature. In the present invention, the above problem is solved by configuring a level shifter circuit between the drain node and the gate node of the reference voltage generation transistor. Further, by using a constant current source utilizing a depletion transistor and series feedback resistors as a reference current, this circuit becomes stable against the variations of the device parameters as well as the variations of the temperature and supply voltage.

REFERENCES:
patent: 5506544 (1996-04-01), Staudinger et al.
patent: 5633610 (1997-05-01), Maekawa et al.

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