Multiprocessor system with processor arbitration and priority le

Details Multiprocessor system with processor arbitration and priority le Multiprocessor system with processor arbitration and priority le

1995-02-10

1996-12-31

Lall, Parshotam S.

395733, G06F 1326, G06F 1337

Patent

active

055903800

ABSTRACT:
According to this invention, an interrupt right control unit transfers an interrupt right to a succeeding processor module. When the processor module has the interrupt right, and the interrupt right control unit receives an interrupt signal, the interrupt right control unit outputs an interrupt signal to a corresponding processor and stops transferring the interrupt right. The corresponding processor then sets the priority levels for the processor modules and performs interrupt processing in response to the interrupt signal. Then the corresponding processor causes the interrupt right control unit to continue the transferring of the interrupt right.

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Intel Advance Information 83289, "Message Passing Coprocessor a Multibus II Bus Interface Controller", Feb. 1988.

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