N-port wide bandwidth cross-link register

Details N-port wide bandwidth cross-link register N-port wide bandwidth cross-link register

1992-06-01

1993-11-09

Shaw, Dale M.

395200, G06F 1300

Patent

active

052610560

ABSTRACT:
The cross-link register allows multiple digital processors to pass data and control parameters to a common region. The N-port wide bandwidth crosslink register (WBCR) represents a method for interconnection of N different digital interconnection units (DIUs). The WBCR comprises a group of registers, multiplexers, and a clock circuit, in which: (1) each DIU has write access to only one register which is dedicated to it; (2) each DIU has guaranteed read access to the dedicated registers of any other DIU; and (3) all DIUs may be run asynchronously. The output of each register is routed to the input of each multiplexer. The address lines of each port allow the selection of the output of the particular register, including the register associated with the calling port (for example, port 1 can access all registers, including register 1). The clock establishes the refresh interval of the registers, which are assumed to be collections of master-slave data flip-flops. Hence, any DIU may update its own register (only), but this data cannot be accessed by any other DIU until the register is clocked, in which case the data at the input is transferred to the output.

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