Packet switching system for forwarding packets from input buffer

Details Packet switching system for forwarding packets from input buffer Packet switching system for forwarding packets from input buffer

1993-12-27

1995-05-02

Chin, Wellington

Multiplex communications

Wide area network

Packet switching

370 941, H04L 1256

Patent

active

054126487

ABSTRACT:
A packet switching system comprises input buffers and output buffers, and a self-routing network for routing packets from the input buffers to the output buffers according to the routing information contained in their header. An input controller, associated with each input buffer, includes an idle/busy memory. An output controller associated with each output buffer, detects the idle space of the associated output buffer and determines if the idle space is greater than a predetermined value. If the idle space is determined to be greater than the predetermined value, an idle status bit is generated and if the idle space is determined to be smaller than the predetermined value, a busy status bit is generated. The idle and busy status bits are broadcast to the idle/busy memory of all input controllers. Each input controller writes an incoming packet into the associated input buffer and reads it onto the self-routing network if an idle status bit is stored in the idle/busy memory corresponding to the routing information of the incoming packet.

REFERENCES:
patent: 4964119 (1990-10-01), Endo et al.
patent: 5014265 (1991-05-01), Hahne et al.
patent: 5126999 (1992-06-01), Munter et al.
patent: 5291482 (1994-03-01), McHarg et al.
Y. Doi et al., "A very high-speed ATM switch with input and output buffers", ISS '92, vol. 2, Oct. 1992, pp. 231-235.

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