Serial bus system with a single-wire line

Multiplex communications – Wide area network – Packet switching

Patent

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Details

Other Related Categories

34082564, 34082567, 375237, 370 44, H04L 2906

Type

Patent

Status

active

Patent number

054126444

Description

ABSTRACT:
A method and circuit arrangement for a single-wire bus system wherein a commercially available processor reads data from a transmitter. The transfer of the data over a single-wire line is controlled exclusively by the processor. The processor generates a pulse sequence on the single-wire line that is stopped by the transmitter after attainment of a predetermined number (N) of pulses by locking the single-wire line at a predetermined voltage level.

REFERENCES:
patent: 2430139 (1944-01-01), Peterson
patent: 3723657 (1973-03-01), Muller
patent: 3845473 (1974-10-01), Kawashima
patent: 4677308 (1987-06-01), Wroblewski et al.
patent: 5237322 (1993-08-01), Heberle
Patent Abstracts of Japan, P-622, vol. 11, No. 303, Oct. 3, 1987.
Data Communications, vol. 15, No. 1, Jan. 1986, New York, U.S., pp. 171-175.
"Elektronik", vol. 39, No. 10, May 11, 1990, pp. 140-143.

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