Television frame synchronizer with independently controllable in

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

358148, 358 31, H04N 504, H04N 964

Patent

active

046461515

ABSTRACT:
A frame synchronizer having broad applicability in television systems is particularly adapted for use in a chrominance time-compressed, luminance bandwidth reduced television system. The frame synchronizer, which separates the composite video signal into its component parts and thereby minimizes the dynamic range required to digitize the signal, demodulates the chrominance signal into its quadrature components and separates the luminance signal. The synchronization signal in the composite video signal generates slave distribution signals and slave horizontal and vertical addresses. The separated chrominance quadrature components and the luminance signal are digitized and, along with the slave distribution signals and the slave horizontal and vertical addresses, are temporarily stored in first-in, first-out memories which provide independent buffering and thereby accommodate a high degree of mismatch between master and slave timing. The chrominance and luminance data are accumulated in distribution registers and transferred to write registers which provide the data input to a frame buffer memory. Master distribution and master horizontal and vertical addresses are generated from a master synchronization signal along with write and read control signals. The data in the write register is read into the frame buffer memory at the slave horizontal and vertical addresses in response to the write control signal, and data in the frame buffer memory is read out from the master horizontal and vertical addresses in response to the read control signal, converted to analog signals, and combined to form a composite signal.

REFERENCES:
patent: 4134131 (1979-01-01), Hopkins, Jr.
patent: 4445135 (1984-04-01), Heitmann et al.
patent: 4599650 (1986-07-01), Wilkinson

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