Non-volatile associative memory with low transistor count

Static information storage and retrieval – Associative memories – Ferroelectric cell

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365154, 365185, 36518901, G11C 1500

Patent

active

053474830

ABSTRACT:
A non-volatile memory cell is disclosed. The non-volatile memory cell includes first and second selecting transistors, first and second non-volatile memory transistors for storing data in a non-volatile manner, and first and second output transistors. A gate of the first selecting transistor and a gate of the second selecting transistor are connected to a word line. A drain of the first selecting transistor is connected to a first bit line, and a drain of the second selecting transistor is connected to a second bit line. A drain of the first non-volatile memory transistor is connected to a source of the first selecting transistor. A drain of the second non-volatile memory transistor is connected to a source of the second selecting transistor. A source of the first non-volatile memory transistor and a source of the second non-volatile memory transistor are connected to a source line. A gate of the first non-volatile memory transistor and a gate of the second non-volatile memory transistor are connected to a control gate line. A drain of the first output transistor and a drain of the second output transistor are connected to a first output line. A source of the first output transistor and a source of the second output transistor are connected to a second output line. A gate of the first output transistor is connected to a drain of the first non-volatile memory transistor. A gate of the second output transistor is connected to a drain of the second non-volatile memory transistor.

REFERENCES:
patent: 4460978 (1984-07-01), Jiang et al.
patent: 5051948 (1991-09-01), Watabe et al.
Carr, W. N. et al., MOS/LSI Design and Application Texas Instrument Electronics Series, Holliday Lithograph Corp. (1972) pp. 222-225.

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