Methods and means for simultaneously correcting several channels

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G06F 1112

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active

042053242

ABSTRACT:
An apparatus for simultaneously correcting several channels in error is combined with a parallel multi channel data handling system. The apparatus encodes and records vertical parity checks in a first channel and encodes and records parity checks in a second and third channel or equivalent taken over the channels in respective predetermined positively and negatively sloped directions.
Upon readback, syndromes from the parity checks and the recorded data are obtained. Correction signals from at least two syndromes intersecting the same error in a known channel in error are formed. The values of the syndromes diagonally intersecting each error in the known channel are continuously modified as the error is detected by inversion of the simple parity. Correction is attained by logically combining the correction signals with the original known channel in error data.
Internal pointers to either first or subsequent channels in error are generated as a function of the bit position displacement in the in-channel direction between the occurrence of first and subsequent mismatches of vertical and diagonal syndromes. Internal pointers are generated either in the absence of or to supplement any external pointers.

REFERENCES:
patent: Re28923 (1976-08-01), Patel
patent: 3745526 (1973-07-01), Hong et al.
patent: 3745528 (1973-07-01), Patel
patent: 3800281 (1974-03-01), Devore et al.
patent: 3851306 (1974-11-01), Patel
patent: 3868632 (1975-02-01), Hong et al.
patent: 3958220 (1976-05-01), Marshall
patent: 4052698 (1977-10-01), Ragle

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