Method of making a groove structure for isolation between elemen

Details Method of making a groove structure for isolation between elemen Method of making a groove structure for isolation between elemen

1993-09-09

1994-09-13

Thomas, Tom

Fishing, trapping, and vermin destroying

437 6, 437981, 156644, H01L 21306

Patent

active

053468490

ABSTRACT:
A semiconductor structure comprises a gate-turn-off thyristor region (GR) and a diode region (DR) with an isolation area (SR) therebetween. The isolation area is provided with a multistage groove (30) having step structures (34,35). The multistage groove is formed through a two-stage etching process, and over-etched regions in the bottom corners of the multistage groove are relatively shallow ones. This structure is effective for increasing the breakdown voltage of the semiconductor structure and isolations between the gate-turn-off thyristor region and the diode region.

REFERENCES:
patent: 4822757 (1989-04-01), Sadamori
patent: 4914043 (1990-04-01), Nishizawa et al.
patent: 4925808 (1990-05-01), Richardson

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