Method of fabrication of integrated circuit isolation structure

Details Method of fabrication of integrated circuit isolation structure Method of fabrication of integrated circuit isolation structure

1992-09-08

1995-02-07

Fourson, George

Fishing, trapping, and vermin destroying

437 90, H01L 2176

Patent

active

053875389

ABSTRACT:
A method for forming semiconductor device isolation structures first defines a field isolation region (66) in a semiconductor substrate (60) and then forms a seed region layer (78) for receiving a selectively grown silicon island. Next, chemical-vapor-deposited silicon dioxide spacers (82) are formed along the sidewall of field isolation region (66). A selectively grown silicon island (84) is then formed within field isolation region (66) having a sufficient thickness for filling the remainder of field isolation region (66) upon the formation of field oxide region (88). After selectively removing silicon dioxide sidewalls (82), silicon island (84) is oxidized to form field oxide region (88) that fills field isolation (66) region. Seed region insulating layers (74 and 76) separate field oxide region (88) from semiconductor substrate (60). Following the formation of field oxide region (88), the resulting wafer is available for subsequent device fabrication processing.

REFERENCES:
patent: 4473598 (1984-09-01), Ephrath et al.
patent: 4847214 (1989-07-01), Robb et al.
patent: 4942137 (1990-07-01), Sivan et al.
patent: 5183795 (1993-02-01), Ting et al.
patent: 5212110 (1993-05-01), Pfeister et al.

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