Buffer circuit having decreased current consumption

Details Buffer circuit having decreased current consumption Buffer circuit having decreased current consumption

1987-03-20

1988-11-15

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, 307491, 307542, 307572, H03K 19017, H03K 19094, H01L 1116, G06G 710

Patent

active

047852038

ABSTRACT:
This invention provides a buffer circuit for a semiconductor integrated circuit having a power source voltage, an input node receiving for an input current from the integrated circuit, and an output node for outputting an output current responsive to the input current. The circuit comprises a load transistor circuit having first and second states, for increasing the input current of the buffer circuit from a first predetermined voltage when the load transistor circuit is in one of the first and second states; a drive transistor circuit having first and second corresponding states, for increasing the input current of the buffer circuit from a second predetermined voltage when the load transistor circuit is in a state opposite to the one state; and a circuit for reducing the rate of increase in the input current of the buffer circuit for stabilizing the power source voltage.

REFERENCES:
patent: 4103188 (1978-07-01), Morton
patent: 4305009 (1981-12-01), Miyagawa et al.
patent: 4477741 (1984-10-01), Moser, Jr.
patent: 4518873 (1985-05-01), Suzuki et al.
patent: 4567378 (1986-01-01), Raver
patent: 4587445 (1986-05-01), Kanuma
patent: 4622482 (1986-11-01), Ganger
patent: 4638187 (1987-01-01), Boles et al.
patent: 4682055 (1987-07-01), Upadhyalula

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