Method for efficient memory use

Television – Bandwidth reduction system – Data rate reduction

Patent

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Details

348718, 348719, 348721, H04N 7133, H04N 7137

Patent

active

053862333

ABSTRACT:
A system and method are provided for encoding and decoding data in a video processor system wherein image data values represent a plurality of successive images. A current image is stored into a block of memory locations and later read from the block of memory locations, encoded and transmitted. In addition to being transmitted, the encoded data values are also decoded in order to provide companded image values. The companded image values are then stored into the same block of memory locations as the current image. The data values representing the current image are simultaneously read from the memory block while the companded values are being stored into the same memory block under the control of a number of pointers and a number of synchronization flows. Additionally, the companded data values are simultaneously read from the same memory block for the purpose of performing motion estimation. The system of the present invention therefore permits the same block of memory locations to be used for dynamically storing and reading a plurality of images.

REFERENCES:
patent: 4758881 (1988-07-01), Laspada
patent: 4980765 (1990-12-01), Kudo
patent: 5163103 (1992-11-01), Uetani
patent: 5173773 (1992-12-01), Ueda
patent: 5287420 (1994-02-01), Barrett

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