Fishing – trapping – and vermin destroying
Patent
1993-02-16
1994-11-15
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 60, 437919, H01L 2170, H01L 2700
Patent
active
053648110
ABSTRACT:
A dynamic random access memory (DRAM) is disclosed that can effectively prevent the formation of steps in the boundary region of a memory cell array 101 and a peripheral circuit 102, even in high integrated devices. This DRAM includes a double peripheral wall 20 of peripheral walls 20a and 20b at the boundary region of the memory cell array 101 and the peripheral circuit 102 of a P type silicon substrate 1, extending vertically upwards from the P type silicon substrate 1. The upper surfaces of the devices formed on the memory cell array and the peripheral circuit 102 in forming devices on the memory cell array 101 and the peripheral circuit 102 are substantially planarized, by virture of the double peripheral wall 20, to effectively prevent steps from being generated in the boundary region of the memory cell array 101 and the peripheral circuit 102, even in high integrated devices.
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Application No. 07/364,033 dated Jul. 10, 1991 to Wakamiya et al.
Ajika Natsuo
Arima Hideaki
Hachisuka Atsushi
Motonami Kaoru
Okudaira Tomonori
Chaudhuri Olik
Mitsubishi Denki & Kabushiki Kaisha
Tsai H. Jey
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