Fishing – trapping – and vermin destroying
Patent
1987-11-30
1989-02-07
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 84, 437203, 437 65, 148DIG150, H01L 21225, H01L 21308
Patent
active
048031780
ABSTRACT:
A semiconductor arrangement has a substrate which carries a partially filled array of semiconductor cells, and utilises the vacant sites in the array to position interconnecting tracks. A filled array is manufactured, and when the electrical function of the arrangement has been allocated, those semiconductor cells, each of which contains active semiconductor devices, which are not needed to perform the allocated function are removed. The vacant sites so formed are then occupied by electrically conductive tracks. The arrangement is suitable for silicon-on-sapphire gate arrays.
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Lambert, R., "Silicon on Sapphire Technology" IEE Tutorial Meeting on Silicon on Insulator-Current Status and Future Potential, (Dig. No. 75), 2/1-4, Mar. 1987.
Turmaine, B., "Commercial Use for SOI Chips" Electron. Weekly, No. 1373, p. 22, Jul. 15, 1987.
Hearn Brian E.
Marconi Electronic Devices Limited
Thomas Tom
LandOfFree
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